Adventures with HPC Accelerators GPUs and Intel MIC Coprocessers

Researchers from Mellanox Technologies and the Texas Advanced Computing Center share early experiences with new hardware
SALT LAKE CITY, Aug. 31, 2011 — For the past few years, the buzz around hardware accelerators, particularly graphics processing units (GPUs), has been growing. Designed with a massive number of floating point units and very high memory bandwidth so as to accelerate certain computing processes, GPUs and other emerging accelerates are being embraced by the scientific computing world as a way to speed up simulation, modeling, visualization, and data analysis.
Several of the nation's most advanced computing systems that are part of the Extreme Science and Engineering Discovery Environment (XSEDE) currently run on GPUs. The Forge cluster at the National Center for Supercomputing Applications, Nautilus at the National Institute for Computational Sciences, TeraDRE at Purdue University, the Longhorn and Spur systems at the Texas Advanced Computing Center, and the Keeneland Project, developed under a partnership that includes the Georgia Institute of Technology, the University of Tennessee at Knoxville, and Oak Ridge National Laboratory, all employ GPUs.
At the TeraGrid 2011 conference in Salt Lake City, Pak Liu, a software engineer from Mellanox Technologies, and Lars Koesterke, a computational researcher at the Texas Advanced Computing Center (TACC), shared results from their experiences using emerging accelerator and coprocessor technology that will be increasingly relevant in the XSEDE era.
Lui's talk focused on GPUDirect, a new transfer protocol that reduces latency and increases performance for end-to-end data transfers between GPUs. The problem, Lui explained, is that current GPU communication is redundant, requiring data to be copied between "pinned" memories during an operation, and often needs to steal cycles from the CPU to schedule and initiate jobs.
"There are many things you can do with the GPU capability and the good floating point arithmetic it provides," Lui said. "But to scale out and use many machines together, you need Infiniband to get the communication across."
Developed collaboratively by Mellanox, NVIDIA, and researchers at several HPC center, GPUDirect allows for faster GPU-to-GPU communication. Lui showed benchmarks of the protocol for two well-known molecular dynamics codes, AMBER and LAMMPS. GPUDirect reduced latency in the codes by 30 percent and improved overall performance by 20-40 percent. Lui stressed that performance gains depend on the specific application, the dataset size, and communication required.
In order to achieve these gains, the researchers had to modify the Linux kernel, the NVIDIA drivers, and the Mellanox drivers to eliminate memory copies and CPU involvement in the GPU data transfer.
"Eventually, scientific applications must scale to many GPU nodes and we needed to find an efficient way to communicate," Lui said.
First released in June 2010, GPUDirect v1.0 is supported by InfiniBand solutions from Mellanox and QLogic, and other vendors are adding support for the technology in their hardware and software products.
Whereas GPUs have been used in the high-performance computing world for several years, Intel's many integrated core (or MIC, pronounced "Mike") architecture is yet to hit the market. Intel has granted several dozen institutions, including TACC, early access to MIC cards and trained these partners in how to use the technology. TACC's role has been to test various computing codes on the MICs and provide Intel with feedback regarding the programming support, optimization, and needs of the HPC community.
"The most important question is how will we exploit this new technology? How difficult will it be to code?" Koesterke said.
MIC is Intel's answer to NVIDIA and AMD's GPU challenge. Both GPUs and Intel's MIC coprocessors allow far greater processing speeds by enabling many more threads to occur simultaneously. Both connect to the CPU through a PCI bus. The key difference between the two technologies, according to Koesterke, is that Intel's MICs take advantage of the x86 architecture that has dominated the high-performance (and consumer) computing world for decades, whereas GPUs have a stream processing architecture quite different from traditional cores.
Also, MICs are coded using C, C++, Fortran and OpenMP — languages familiar to the open science community. GPUs are coded with CUDA and OpenCL, newer languages that many in the community have not yet mastered. According to Koesterke, the community's familiarity with the x86 architecture means researchers should have an easier time taking advantage of the capabilities of the new technology with less recoding and a faster ramp-up time.
Though promising, MICs are not without risks. "MIC is not yet a product," Koesterke said. "The programming models are all there, but sustained performance is yet to be proven."
Koesterke could not provide the details from initial benchmarking efforts at TACC (under nondisclosure); however, he said the evidence suggests that MICs will be an attractive option to computational scientists when they are released in late 2012 or early 2013.
Other sessions at the conference highlighted the development of MATLAB for GPUs and tuning GPUs for matrix multiplication. In addition, many of the finalist projects in the scientific visualization contest were created using GPU cluster systems.
Hardware accelerators are changing the way computational scientists think about their problems, allowing even greater parallelism and processing power. Much work is still needed for the community to take full advantage of these technologies, but based on the early adoption patterns in the XSEDE community, it appears these new processors will be part of the performance equation for a long time to come.
Aaron Dubrow
Texas Advanced Computing Center